The present invention relates to a ultrasonic flaw detecting system for detecting flaws in an object to be inspected by use of a an ultrasonic wave, and, more particularly, relates to a an ultrasonic flaw detecting system which is suitable for detecting, in detail and quickly, internal flaw conditions of an object to be examined.
A supersonic flaw detecting system has been used in various fields for the purpose of detecting internal flaws of an object to be inspected without destruction. In most cases, existence of internal flaws of an object to be inspected is checked within a predetermined range of the object. In such cases, the aforementioned range of the surface of the object is scanned by a probe to conduct flaw detection. As the probe, an array probe constituted by a large number of piezoelectric elements arranged linearly has been put into practical use, for example, as described in the paper by J. Kubota et al., entitled "High Speed Ultrasonic Image of IC Package". A supersonic flaw detecting system using such an array probe will be described hereunder.
FIG. 1 is a perspective view of a scanner portion of the supersonic flaw detecting system, and FIGS. 2A and 2B are a plan view and a side view of the array probe, respectively. In the drawings, the reference numeral 1 designates a flaw-detection water tank, 2 water put into the water tank 1, and 3 an object to be inspected mounted on the bottom surface of the water tank 1. The reference numeral 4 generally designates a scanner portion constituted by the following parts. The reference numeral 5 designates a scanner base for mounting the water tank 1 thereon, 6 a pair of frames fixed to the scanner base 5, 7 an arm disposed between the frames 6, 8 a holder disposed on the arm 7, 9 a pole attached to the holder 8, and 10 an array probe. The pair of frames 6 can drive the arm 7 in the Y-axis direction by a mechanism not shown. The arm 7 can drive the holder 8 in the X-axis direction by a mechanism not shown. The holder 8 and the pole 9 can cooperate to drive the array probe in the Z-axis direction (the direction orthogonal to the X- and Y-axes) by a mechanism not shown.
The array probe 10 has a configuration in which a large number of piezoelectric elements (hereinafter referred to as "array elements") are arranged linearly in the X-axis direction. When a pulse is given to each array element, the array element emits a supersonic wave and converts the reflected ultrasonic wave into an electric signal proportional thereto. In FIGS. 2A and 2B, the array elements are designated by numerals 10.sub.1 to 10.sub.n, respectively. In the drawings, black spots represent sampling points, YP represents a Y-axis direction sampling pitch, XP represents an X-axis direction sampling pitch, and AP represents an array element pitch in the array elements 10.sub.1 to 10.sub.n. The reference numeral 11 designates a package for packing the array probe 10 and the like therein.
The outline of the function of the array probe 10 will be described with reference to FIGS. 3A and 3B. In FIG. 3A, T.sub.1 to T.sub.9 represent array elements arranged linearly, D.sub.1 to D.sub.9 represent delay elements connected to the array elements 10.sub.1 to 10.sub.9, and p represents an excitation pulse received by each of the array elements T.sub.1 to T.sub.9. Two delay elements D.sub.1 and D.sub.9 are established to have an equal delay period. Similarly, two delay elements D.sub.2 and D.sub.6, two delay elements D.sub.3 and D.sub.7, and two delay elements D.sub.2 and D.sub.6 are established to have equal delay periods (t.sub.28), (t.sub.37), and (t.sub.46), respectively. When the delay period of the delay element D.sub.5 is represented by t.sub.5, the delay periods thus established satisfy the following relation. EQU t.sub.19 &lt;t.sub.28 &lt;t.sub.37 &lt;t.sub.46 &lt;t.sub.5 . . . (1)
Assuming now that the delay periods of the delay elements D.sub.1 to D.sub.9 are set to predetermined values according to the relation (1) and are supplied with excitation pulses p, then supersonic waves are emitted from the array elements T.sub.1 to T.sub.9 corresponding to the set delay periods. Accordingly, the supersonic waves emitted from the two array elements T.sub.1 and T.sub.9 are earliest and the supersonic wave emitted from the array element T.sub.5 is last. The ultrasonic waves thus emitted from the array elements are propagated radiately, so that there occurs a point where the maximum values of amplitude of the ultrasonic waves coincide with each other. This point is represented by the symbol B in FIG. 3A. Because the magnitude of supersonic wave at this point B is far larger than the magnitude of ultrasonic wave at another point, the supersonic waves emitted from the array elements T.sub.1 to T.sub.9 are in such a state that they are converged into the point B as shown in the broken line. In other words, if suitable delay periods are given to the ultrasonic waves emitted from the array elements arranged linearly, an effect that the supersonic waves are converged into the point B can be attained. Hereinafter, this point B is referred to as a "focal point". If the delay periods are set to be respectively smaller than the aforementioned delay periods while the relation (1) is satisfied, the focal point B is shifted to a focal point B' which is longer as shown in the dot-and-dash line. Accordingly, the position of the focal point can be selected by adjusting the delay periods of the delay elements D.sub.1 to D.sub.9 as described above. In the case where this way is adapted to detection of a flaw in the object 3, the depth of flaw detection can be selected.
FIG. 3B is a view for explaining the function of the array probe 10 as shown in FIGS. 2A and 2B. In the drawing, the reference numerals 10.sub.1 to 10.sub.n designate array elements which are the same as in FIG. 2A. Delay elements not shown are connected to the array elements 10.sub.1 to 10.sub.n, respectively. In the example of FIG. 3B, a number, m, of array elements 10.sub.1 to 10.sub.m are selected so that supersonic waves emitted therefrom are apparently converged into a focal point B.sub.1 in the same manner as described above by setting the delay periods suitably. This focal point B.sub.1 is represented by the symbol B.sub.1 in the FIG. 3B. Then, the array elements are shifted by one so that delay periods having the same pattern as the delay periods given to the array elements 10.sub.1 to 10.sub.m are given to newly selected array elements 10.sub.2 to 1.sub.m+1. The focal point thus obtained is represented by the symbol B.sub.2. Similarly, the array elements are shifted one by one and, lastly, array elements 10.sub.n-m+1 to 10.sub.n are selected so that delay periods having the same pattern are given to the array elements, thus to obtain a focal point B.sub.n-m+1. By the aforementioned procedure, flaw-detection scanning from the focal point B.sub.1 to the focal point B.sub.n-m+1 by the array probe 10 can be conducted consequently. In FIG. 3B, AP represents an element pitch of the probe, and SP represents a sampling pitch. Although FIG. 3B shows the case where AP is equal to SP, the values of AP and SP may be established by use of known electronic control means to satisfy the equation SP=(1/2)AP or SP=(1/4)AP.
Although the description of delay periods by reference to FIGS. 3A and 3B has been applied to the case where ultrasonic waves are transmitted from the array elements, it is a matter of course that similar delay periods are required to be given to the array elements in the case where the ultrasonic waves reflected from the object are received by the array elements.
In the following, a control circuit in the supersonic flaw detecting system using the array probe is described. FIG. 4 is a block diagram of the control circuit. In FIG. 4 the reference numeral 10 designates an array probe as described above, 7M a motor for driving the arm 7 in the Y-axis direction, 8M a motor for driving the holder 8 in the X-axis direction, 7E an encoder for generating a driving signal to be given to the motor 7M and for detecting the amount of rotations of the motor 7M, and 8E an encoder for generating a driving signal to be given to the motor 8M and for detecting the amount of rotations of the motor 8M. The reference numeral 20 designates a signal processor comprising a CPU (central processing unit) 20a, an image L memory 20b for image processing, an interface 20c for input-output between the signal processor 20 and a certain external circuit, and a keyboard 20d. The signal processor 20 further has other elements such as RAM and ROM, the other elements being not shown. The reference numeral 21 designates a display unit.
The reference numeral 22 designates a delay period control circuit for controlling, under orders of the CPU 20a, delay periods which have been described with reference to FIGS. 3A and 3B. The reference numeral 23 designates pulsers for generating the excitation pulses p. In this example, a plurality of pulsers 23 are provided corresponding to the array elements. The reference numeral 24 designates a pulser-amplifier switching circuit for selectively switching the pulsers 23 in accordance with the instructions from the CPU 20a. The details of the pulser-amplifier switching circuit 24 will be described later. The reference numeral 25 designates AND circuits, and 26 amplifiers for reception and amplification of reflected wave signals of the ultrasonic waves emitted from the array elements. The AND circuits 25 and the amplifiers 26 are similarly provided corresponding to the array elements. The reference numeral 27 designates a delay period control circuit, and 28 a waveform adder. The waveform adder 28 serves to add up all reception signals obtained simultaneously as the result of delaying in the delay period control circuit 27. The reference numeral 29 designates a peak detector having a gate function for picking up signals in a predetermined range of depth from the surface of the object 3 and a function for storing only a peak value within the range and sending out the peak value. The reference numeral 30 designates an A/D converter for converting the peak value stored in the peak detector 29, into a digital value.
The configuration and operation of the pulser-amplifier switching circuit 24 will be now described with reference to FIG. 5 and FIG. 6 (diagrams (A) through (0)). FIG. 5 is a block diagram of the pulser-amplifier switching circuit, and FIG. 6 (diagrams (A) through (0)) is a timing chart of the pulser-amplifier switching circuit. For simplification of illustration, FIGS. 5 to 6 show the case where the number of array elements to be excited at once is four. As shown in FIG. 5, the pulser-amplifier switching circuit 24 is constituted by a shift register formed by series connection of R-S master-slave flip-flop circuits (hereinafter referred to merely as "flip-flop") F.sub.1 to F.sub.n+3 in the number corresponding to the number of the array elements. In the drawing, Q.sub.1 to represent output signals of the flip-flops F.sub.1 to F.sub.n+3. The pulser-amplifier switching circuit 24 operates as follows.
As shown in the diagram (B) of FIG. 6, clear pulses are fed to the CLR terminals of the flip-flops F.sub.1 to F.sub.n+3, so that the levels of all the output signals Q.sub.1 to Q.sub.n+3 become low. Then, as shown in the diagrams (C) to (F) of FIG. 6, preset pulses PR.sub.1 to PR.sub.4 are fed to the PR terminals of first four flip-flops F.sub.1 to F.sub.4 In this condition, clock pulses C.sub.1, C.sub.2, . . . as shown in the diagram (A) of FIG. 6A are fed from a clock generator (not shown) to the CK terminals of the flip-flops F.sub.1 to F.sub.n+3, successively.
Then, the levels of the output signals Q.sub.1 to Q.sub.4 of the flip-flops F.sub.1 to F.sub.4 each in a preset state become high as shown in the diagrams (G) to (J) of FIG. immediately after the preset pulses PR.sub.1 and PR.sub.4 are received. These four high-level output signals Q.sub.1 to Q.sub.4 serve as excitation signals for four array elements of from the first-order element to the fourth-order element. The excitation signals are fed to the four array elements in a first time E.sub.1. Then, when the clock pulse C.sub.1 is received, the level of the output signal Q.sub.1 becomes low as shown in FIG. 6(G) because the level of the S terminal of the flip-flop F.sub.1 is low. At the same time, the level of the S terminal of the flip-flop F.sub.5 becomes high on the basis of the output signal Q.sub.4, so that the level of the output signal Q.sub.5 thereof becomes high as shown in the diagram (K) of FIG. 6. Accordingly, excitation signals are fed to four array elements of from the second-order array element to the fifth-order array element in a next time E.sub.2. When the next clock pulse C.sub.3 is received, the levels of the output signals Q.sub.3 to become high in a time E.sub.3 in the same manner as described above. Thus, high-level output signals are successively shifted one by one, so that the array elements are successively selected by fours.
In the following, the operation of the pulser-amplifier switching circuit 24 shown in FIG. 4 is described with reference to FIG. 7. FIG. 7 is a simplified block diagram of an array element excitation circuit. Like numerals in each of FIGS. 4 and 7 refer to like parts. For simplification of illustration, a circuit corresponding to one array element 10.sub.1 is shown in FIG. 7. As described above, the number of the pulsers 23, the number ((n+3) in FIG. 3) of the AND circuits 25 and the number of the amplifiers 26 are, in practice, respectively equal to the number, n, of the array elements. When instructions from the CPU 20 are given to the pulser-amplifier switching circuit 24, the level of the output signal Q.sub.1 of the flip-flop F.sub.1 becomes high as described above. The output sighal Q.sub.1 is fed to the AND circuit 25 and then taken out from the AND circuit 25 after a predetermined delay period given by the delay period control circuit 22. On the basis of the output signal, the pulser 23 generates an excitation pulse to excite the array element 10.sub.1 to thereby emit a supersonic wave. Further, the output signal Q.sub.1 is connected also to the amplifier 26. This signal serves as a trigger signal for the amplifier 26, so that the amplifier 26 operates when the level of the output signal Q.sub.1 is high but the operation of the amplifier 26 stops and the input signal of the amplifier 26 is not transmitted to the output side thereof when the level is low. The fact that the operation stops means the fact that the input signal of the amplifier 26 is not transmitted to the output side thereof. The reflected supersonic wave is received by the same array element 10.sub.1 and converted into an electric signal. The electric signal is amplified by the amplifier 26 and delayed for a time determined by
the reception delay period control circuit 27 and equal to the time determined by the transmission delay period control circuit 22. Then, the signal is fed to the waveform adder 28. The waveform adder 28 serves to add up (four) reception signals of simultaneously excited array elements to feed an adder signal to the image memory 20b of the signal processor 20 via the peak detector 29 and the A/D converter 30. The aforementioned procedure is repeated n times while array elements are successively shifted by one, so that the adder signals thus successively obtained are stored in the image memory 20b. By the n times procedures, one-line ultrasonic wave scanning in the X-axis direction by use of the array probe 10 is perfected. Then, the CPU 20a drives the motor 7M to move the array probe 10 by a predetermined sampling pitch (YP) in the Y-axis direction. Then, the aforementioned procedure started by application of clear pulses is repeated again to carry out ultrasonic scanning in the X-axis direction by use of respective array elements. As described above, X-axis direction ultrasonic scanning and Y-axis direction sampling pitch movement are repeated to thereby carry out flaw detection in a predetermined range of coordinates (X, Y) in a plane in the object 3. The time required for scanning one line in the X-axis direction is very short because of the electronic scanning, so that the motor in the Y-axis direction can be driven continuously.
Through the aforementioned operation, flaw detection data at intersections determined by the X-axis direction sampling pitch XP (for example, the distance between adjacent array elements) and the Y-axis direction sampling pitch YP are stored in the image memory 20b. The signal processor 20 processes the data stored in the image memory 20b so that the resulting data are displayed on the display unit 21. FIG. 8 shows an example of display in the display unit. In the drawing, the reference numeral 21D designates a display surface of the display unit 21, the reference numeral 3' designates a ultrasonic image of the object 3 displayed on the display surface, and F.sub.1 to f.sub.3 designate flaw images in the ultrasonic image 3'. The concept "flaw" herein used includes internal separation of an IC package, corrosion of a plating layer of a steel pipe, and gross porosity of a casting. The display surface 21D has a large number of picture elements arranged in the form of a matrix. The picture elements in the display surface 21D are numbered corresponding to the addresses in the image memory 20b, so that the signal processor 20 can carry out display of the data stored in the image memory 20b.
On the other hand, U.S. Pat. No. 4,768,155, a prior art reference, discloses a supersonic flaw detecting system in which a probe of single type, not array type, is mechanically moved both in the X-axis direction and in the Y-axis direction for the purpose of scanning.
Because this ultrasonic flaw detecting system conducts mechanical scanning in the X-axis direction as well as in the Y-axis direction, the time required for obtaining one scene is of the order of tens of seconds.
The first prior art type supersonic flaw detecting system as described above with reference to FIGS. 1 to 8 conducts supersonic flaw detection in an X-Y plane (A scope) in a predetermined depth from the surface of the object 3 to obtain a ultrasonic image in the plane, so that existence of flaws can be found.
To perform more excellent production control and quality control, detailed data of flaw such as position of a flaw depth, a flaw shape and the like are required. To obtain the information, both an A-scope image (waveform) and a B-scope image (vertical sectional image) in the position of a flaw are required. The second prior art type ultrasonic flaw detecting system is configured so that a C-scope image (horizontal sectional image) is displayed and then an A-scope image can be obtained in a desired position of the C-scope image. However, the system is so slow that the time of from the order of tens of seconds to the order of minutes is required for obtaining the C-scope image, because the scanning both in the X-direction and in the Y-direction is mechanical. On the contrary, the first prior art type system is so speedy that the time required for obtaining the C-scope image is about one second or of the order of seconds, but the system is not suitable for detailed inspection though the detailed inspection is necessary.